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Modelling


Converting from Distributed to Lumped Elements
Extracting Parasitics in Basic Electronic Components
Lumped Element Circuit Modelling in Presence of Substrate-Through-Via
Noise Characteristics of GaInP/GaAs HBT at 29 GHz
Interconnect Modelling of Coplanar HBT Transistor Arrays
All Band Stabilization of Transistors


Publications

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Converting from Distributed to Lumped Elements


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Extracting Parasitics in Basic Electronic Components


Filter Photo


Using Ideal filter cpomponent values.


Taking into consideration parasitics

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Lumped Element Circuit Modelling in Presence of Substrate-Through-Via

A. P. Freundorfer and Y. Jamani*
Department of Electrical and Computer Engineering
Queen's University
Kingston, Ontario, CANADA K7L 3N6

*Canadian Microelectronics Corporation
210A Carruthers Hall
Kingston, Ontario, Canada K7L 3N6

Abstract-Commercial use of LMDS will require a very low cost solution for making components in the Ka-band. To do this, an inexpensive device technology is necessary with a high level of integration. A lumped element design methodology is present that utilizes EM simulation to yeild accurate and predictable results.


EM sim Layout

Chip photo

Simulation: Hspice, HP/eesof Libra series IV and Zeland IE3D
Layout tools:
HP/eesof Libra series IV (secondary), Zeland IE3D (primary) and Cadence (secondary)
Fab:
Nortel HBT
Technical Support:
CRC and Nortel Technologies
Funding:
NSERC and Nortel Technologies

For more information see:





Noise Characteristics of GaInP/GaAs HBT at 29 GHz

B. Lemna and A.P. Freundorfer
Department of Electrical and Computer Engineering
Royal Military College of Canada
Kingston, Ontario, Canada
freund@eleceng.ee.queensu.ca

Abstract-A characterization of bias and emitter periphery-to-area ratio (Pe/Ae) of GaInP/GaAs HBT at 29 GHz is presented. The measured data of fmax, ft, Fmin, associated gain (Ga) and noise measure (NM) for four transistors were obtained. It is shown that the larger periphery-to-area ratio of the emitter, Pe/Ae, the lower the Fmin with a minimum. The best transistor, an array of twenty 2x2 mm2, had Fmin=2.81 dB, Ga = 4.9dB and NM=1.35.


Transistor test structures

Simulation: Hspice
Layout tools:
Cadence
Fab:
Nortel HBT
Technical Support:
CRC and Nortel Technologies
Funding:
NSERC and Nortel Technologies

For more information see:





Interconnect Modelling of Coplanar HBT Transistor Arrays

A. P. Freundorfer and Y. Jamani*
Department of Electrical and Computer Engineering
Queen's University
Kingston, Ontario, CANADA K7L-3N6 

*Canadian Microelectronics Corporation
210A Carruthers Hall
Kingston, Ontario, Canada K7L 3N6

Abstract-A method of modelling common-emitter and common-base transistor arrays using transmission line theory is presented. A comparison between measured results and simulation shows that modelling the interconnect between transistors in the array is good up to 40 GHz.


Layout of an array of 2x10 transistors with emitter array of 2x2 mm. The transistor is in a cascode configuration.

 

 

Simulation: Analytical Model & Hspice
Layout tools: Cadence
Fab: Nortel HBT
Technical Support:
CRC and Nortel Technologies
Funding:
NSERC and Nortel Technologies

For more information see:

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Feedback for multi-band stabilization of CS and CG MESFET Transistors

H.F. Hammad, A.P. Freundorfer, and Y.M.M. Antar
Department of Electrical and Computer Engineering
Queen's University
Kingston, Ontario, CANADA K7L-3N6

Abstract-A new feedback scheme is used to achieve multi-band unconditional stability in common source (CS) and common gate (CG) GaAs MESFET configurations. This technique extends the range of operation of both CG and CS beyond what is currently available. Results based on analytical formulations together with a description of the feedback design procedures are provided. Several CS and CG stabilized transistors were monolithically fabricated and tested. The simulated and measured results showed very good agreement.




Stabilized CG Amplifier

Simulation: Analytical Model & ADS
Layout tools: Cadence
Fab: Nortel MESFET
Technical Support:
Nortel Technologies
Funding:
NSERC and Nortel Technologies

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